from CRC32 import *

testpkt1 = (0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF0,0x79,0x59,0xE0,0x85,0x7B,0x08,0x00,0x45,0x00,0x00,0x4E,0x01,0xC3,0x00,0x00,0x40,0x11,0xF6,0x31,0xC0,0xA8,0x00, 0x5B, 0xC0, 0xA8, 0x00, 0xFF, 0x00, 0x89, 0x00, 0x89, 0x00, 0x3A, 0x5D, 0x55, 0xD6, 0xF4, 0x01, 0x10, 0x00,
           0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x45,0x4A,0x46,0x44,0x45,0x42,0x46,0x45,0x45,0x42,0x46,0x41,0x43,0x41,0x43,0x41,0x43,0x41,0x43,0x41,0x43, 0x41, 0x43, 0x41, 0x43, 0x41, 0x43, 0x41, 0x43, 0x41, 0x41, 0x41, 0x00, 0x00, 0x20, 0x00, 0x01,
           0x12,0x18,0x4A,0xDC) #Length: 96
testpkt2 = (0xAA,0xBB,0xCC,0xDD,0xCC,0xDD,0xF0,	0x79,	0x59,	0xE0,	0x85,	0x7B,	0x08,	0x00,	0x45,	0x00,	0x00,	0x1F,	0x0D,	0xAA,	0x00,	0x00,	0x40,	0x11,	0xEB,	0x71,	0xC0,	0xA8,	0x00,	0x5B,	0xC0,	0xA8,
            0x00,0x07,0x1E,	0x61,0x1E,0x61,0x00,0x0B,	0xDD,	0x30,	0x31,	0x32,	0x33,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,
            0x96,0x5E,0x8D,0xD3) #64

@block
def test_CRC32():
    clk, Reset, Enable = (Signal(bool(0)) for i in range(3))
    Data_in = Signal(modbv(0)[8:])
    Crc, CrcNext = (Signal(modbv(0xffffffff)[32:]) for i in range(2))

    iCRC32 = CRC32(clk, Reset, Data_in, Enable, Crc,CrcNext)


    @instance
    def clkgen():
        while True:
            clk.next = not clk
            yield delay(5)

    @instance
    def stimulus_mac():
        for i in range(130):
            if i >=  10 and i < 10 + 60:
                Enable.next = 1
                Data_in.next = testpkt2[i-10]
                #print(i)
            else:
                Enable.next = 0
                Data_in.next = 0
            yield clk.negedge
        raise StopSimulation()

    return instances()

tbcrc = test_CRC32()
tbcrc.config_sim(trace = True)
#print(len(testpkt2))
tbcrc.run_sim()

